Engineer – Analog Layout (E03AL)

Engineer – Analog Layout (E03AL)

Responsibilities

  • Specialized in custom Analog layout for planer & FinFet technologies
  • Interacts with Circuit Designer to meet design spec with ECOs
  • Works within a team framework for team success
  • Works independently for complex blocks layout
  • Able to understand layout constraints from floorplan
  • Mentored  2-4 layout Interns/engineers technically.
  • Has good understanding of EM-IR and yield issues
  • Delivers block to final assembly level
  • Ability to guide/mentor junior layout engineer
  • Review layout of team members

Requirements

  • The candidate must have a Bachelor or Master in (EC/ME/VLSI)
  • 3-7 years of experience in Custom Analog IC Layout and Integration
  • Hands on experience with FinFet technologies is must
  • Understand issues involved in high speed analog layouts, analog layout challenges and deep submicron layout dependent effects.
  • Strong VLSI fundamentals of semiconductor devices and physics, electrical circuits and IC fabrication.
  • Experienced with Cadence Virtuoso/XL/Advance platform and features
    • Clones, Modgen, Wire assistance, Chaining, Groups and Place and Route
  • Experienced with Calibre/PVS/Assura/Hercules PV tools
  • Good Verbal & written communication skills
  • Skill/Shell/Perl/TCL scripting is a plus
  • Worked on ADC, DAC, PLL, LDO, BGR or similar sub modules

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