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Protected: Analog MRD
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Full Name
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Email
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Phone
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Highest Qualification
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Diploma
Bachelor
Master
Branch/Specialization
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Passout Year
Grade/Percentage
Notice Period(Days)
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Relevant Experience(year)
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Job Function
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Analog Layout
Analog-RF layout
Analog-IO layout
IO layout
Memory-Std layout
circuit
char
pdk
AMS Verification
PD
PV
STA
RTL
DV
DFT
FPGA
Embedded
Validation
Current Company Name
Current CTC/anum(lac) INR
Current Location (City) - (BLR, HYD, NDA, DEL, PNE, CHE, CND)
Preferred Location (City) - (BLR, HYD, NDA, DEL, PNE, CHE, CND)
Tech node Hands on
3nm/4nm/5nm
7nm-10nm
10nm - 16nm
20nm - 32nm
40nm-90nm
100nm-180nm
180nm and higher
Others
Process/Fab Hands on
tsmc
Samsung
ST
GF
UMC
TI
Others
Major Projects
Major Blocks
Major IP
Current status
Referred By (Self/HR/employee)
Attach Resume
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